English translation for "clock pulse"

定时脉冲
计时脉冲
节拍脉冲
节折脉冲
时钟脉冲
同步脉冲
钟脉冲

Related Translations:

clock:  n.1.钟；挂钟，座钟，上下班计时计。2.〔俚语〕记秒表，卡马表；〔美俚〕〔pl.〕驾驶仪表，速度表，里程计。3.〔英俚〕(人的)面孔。4.〔the C-〕【天文学】时钟座〔星座名〕。5.【自动化】(电子计算机的)时钟脉冲(器)。短语和例子a Dutch clock(报时发杜鹃鸣声的)杜鹃钟 (＝cuckoo-clock)。 an eight-day clock八日上一次发

clock number:  上班计时卡号码

clocked fliflop:  时标触发器定时触发器

clock change:  时钟更改

cuckoo clock:  (报时似杜鹃鸣声的)杜鹃钟。

interval clock:  间隔时钟间隔时种

doomsday clock:  末日钟声世界末日之钟世界末日钟

clock washer:  钟用垫圈

clocked up:  拿到

minor clock:  小时钟

Example Sentences:

	1.	A microprocessor designer may decide to make all instructions last five clock pulses . 微处理机设计人员可以决定使所有的指令持续五个时钟脉冲。
	2.	Clock pulse generator 同步脉冲发生器
	3.	Clock pulse circuit 时钟脉冲电路
	4.	Clock pulse width 时钟脉冲宽度
	5.	Clock pulse source 计时脉冲源
	6.	After the stop bit is received , the device will acknowledge the received byte by bringing the data line low and generating one last clock pulse 只有当时钟线为低的时候，主机才可以改变数据线（也就是将数据写入到数据线） 。数据将在时钟为高电平的时候被设备读取。
	7.	Combined with the orcad pspice software , it also simulates the clock pulse circuits and relay circuits on the motherboard . the simulation results can satisfy the requirement of the circuit design 并对母板上的时钟脉冲电路、继电器电路应用orcadpspice进行了模拟仿真，仿真结果符合电路设计要求。
	8.	If the host pulls clock low before the first high - to - low clock transition , or after the falling edge of the last clock pulse , the keyboard / mouse does not need to retransmit any data 如果在第一个高- >低时钟跳变时， （或者在最后一个时钟脉冲的下降沿之后）主机将时钟拉低，键盘/鼠标不必重新传输任何数据。

Similar Words：

"clock polarity" English translation, "clock position" English translation, "clock post" English translation, "clock power" English translation, "clock process" English translation, "clock pulse amplifier" English translation, "clock pulse circuit" English translation, "clock pulse frequency" English translation, "clock pulse gate" English translation, "clock pulse generator" English translation